1. Field of the Invention
The present invention relates to an encoding circuit and a redundancy control circuit using the same, and specifically, to an encoding circuit for generating a global signal from encoding a local repair signal provided by a redundancy block.
2. Discussion of Related Art
In general, a semiconductor device includes a multiplicity of redundancy blocks in order to improve a yield thereof. A specific redundancy block becomes active in accordance with an address and input/output (I/O) signal to be repaired. During this, it needs a global repair signal to represent an activation of a repair mode in a chip operation. Such a global repair signal is generated by encoding local repair signals, supplied by each repair block.
FIG. 1 illustrates an encoding circuit within a conventional redundancy circuit.
Referring to FIG. 1, the encoding circuit includes first through sixteenth NOR gates NO1 to NO16 for outputting first through sixteenth logic signals respectively in response to two local repair signals among first through thirty-second local repair signals REP<0:31>, first through eighth NAND gates NA1 to NA8 receiving the first through sixteenth logic signals outputted from the NOR gates NO1 to NO16, wherein each NAND gate receives two logic signals among the first through sixteenth logic signals, seventeenth through twentieth NOR gates NO17 to NO20 receiving output signals of the first to eighth NAND gates NA1 to NA8, wherein each NOR gate receives two logic signals among the output signals of the NAND gates NA1 to NA8, ninth and tenth NAND gates NA9 and NA10 receiving output signals of the NOR gates NO17 to NO20, wherein each NAND gate receives two logic signals among the output signals of the NOR gates NO17 to NO20, and a twenty-first NOR gate NO21 and an inverter I1 that generates a global repair signal REDGEN by receiving an output signals of the NAND gates NA9 and NA10.
In the encoding circuit shown in FIG. 1, when one of the first through thirty-second local repair signals REP<0:31> is logically high at least, the global repair signal is set to high to inform that a redundancy operation is being carried out in a chip.
However, as a size of the encoding circuit block conventionally used is very large, the encoding circuit block occupies a large portion in a chip. Especially, when the number of local repair signals is increased as the number of redundancy blocks is increased, an area for the encoding circuit may be non-linearly and sharply expanded. Moreover, since it is required that the local repair signals have to be passed to logic gates for five time of logic combination in order to generate the global repair signal, a time delay about 3 ns is consumed until the generation of the global repair signal from the supply of the local repair signals in the conventional encoding circuit, which is disadvantageous to enhancing the processing speed of the redundancy operation. As a result, there is a problem of inducing glitch signals in generating I/O signals.